Processor Architecture and Systems Synthesis Laboratory | 京都大学大学院情報学研究科通信情報システム専攻集積システム工学講座

Kyoto University Open Campus 2012

Posted on Saturday August 11th, 2012 by admin

Kyoto University Open Campus 2012 was held on Aug. 8-9th, 2012. On August 9th (Fri), we gave presentations to introduce our research work.

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The 72nd IEEE Kansai Section Lecture Meeting | Mr. Deepak Mathur (IEEE Region 10 Humanitarian Technology Coordinator)

Posted on Thursday August 2nd, 2012 by admin

A lecture about Humanitarian Technology by Mr. Deepak Mathur (IEEE Region 10 Humanitarian Technology Coordinator) was held at Building 3, Faculty of Engineering, Kyoto University on August 2. Mr. Kawashima (master course student) has partially arranged this lecture as chair of IEEE Student Branch at Kyoto University.

Sponsored by: IEEE Student Branch at Kyoto University and IEEE Kansai Section

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The 25th Workshop on Circuits and Systems @Awaji Yumebutai International Conference Center

Posted on Tuesday July 31st, 2012 by admin

On July 30th, Mr. Morishita and Mr. Kawashima, who are master course students, have presented their works at the 25th Workshop on Circuits and Systems held at Awaji Yumebutai International Conference Center.

Takumi Morishita, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Fast GPU Implementations of Krylov Subspace Methods for Power Grid Analysis,” in Proc. of Workshop on Circuits and Systems, pp.432-437, July 2012 (in Japanese).
Junya Kawashima, Hiroyuki Ochi, Hiroshi Tsutsui, and Takashi Sato, “A Study for Improving Minimum Operation Voltage and its Estimation Accuracy on Low Voltage Circuits,” in Proc. of Workshop on Circuits and Systems, pp.313-318, July 2012 (in Japanese).

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Encouraging Prize from the 24th Workshop on Circuits and Systems

Posted on Monday July 30th, 2012 by admin

At the 25th Workshop on Circuits and System, Mr Kawashima, a second year graduate student, has been awarded an encouraging prize with respect to his following work presented in the same conference last year.

Junya Kawashima, Hiroyuki Ochi, Hiroshi Tsutsui, and Takashi Sato, “A Design Strategy for Subthreshold Circuits Considering Energy-Minimization and Yield-Maximization,” in Proc. of Workshop on Circuits and Systems, pp.401-406, Aug. 2011 (in Japanese).

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IEICE Trans. Fundamentals, Special Section on “VLSI Design and CAD Algorithms” への採録決定

Posted on Sunday July 29th, 2012 by admin

The following two papers have been accepted for publication in IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Special Section on “VLSI Design and CAD Algorithms”, December 2012 Issue.

Hiromitsu Awano, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Bayesian Estimation of Multi-Trap RTN Parameters using Markov Chain Monte Carlo Method,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Dec. 2012 (to appear).
Junya Kawashima, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “A Variability-Aware Energy-Minimization Strategy for Subthreshold Circuits,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Dec. 2012 (to appear).

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Papers accepted for publication in IEICE Trans. Fundamentals, Special Section on “VLSI Design and CAD Algorithms”

Posted on Sunday July 29th, 2012 by admin

Hiromitsu Awano, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Bayesian Estimation of Multi-Trap RTN Parameters using Markov Chain Monte Carlo Method,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Dec. 2012 (to appear).
Junya Kawashima, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “A Variability-Aware Energy-Minimization Strategy for Subthreshold Circuits,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Dec. 2012 (to appear).

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デザインコンテスト(2012年度シンセシス設計セミナー)最優秀賞受賞

Posted on Thursday July 19th, 2012 by admin

At a design contest (target design: SAD/SATD circuit) hosted by Synthesis Corporation, the team named KU&KCCT by Kobe City College of Technology and our laboratory won the 1st prize among 5 teams.

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1st prize at design competition (Synthesis Co. Design Seminar 2012)

Posted on Thursday July 19th, 2012 by admin

At a design contest (target design: SAD/SATD circuit) hosted by Synthesis Corporation, the team named KU&KCCT by Kobe City College of Technology and our laboratory won the 1st prize among 5 teams.