ISQED2013 papers accepted

The following two papers are accepted for presentation at ISQED2013, which will be held at Santa Clara in March 2013.

  • Hiromitsu Awano, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Multi-Trap RTN Parameter Extraction Based on Bayesian Inference,” International Symposium on Quality Electrical Design (ISQED) (Santa Clara, CA), Mar. 2013 (to appear).
  • Takashi Imagawa, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “High-Speed DFG-Level SEU Vulnerability Analysis for Applying Selective TMR to Resource-Constrained CGRA,” International Symposium on Quality Electrical Design (ISQED) (Santa Clara, CA), Mar. 2013 (to appear).
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ASP-DAC 2013 papers accepted

The following two papers will appear in proceedings of ASP-DAC 2013.

  • Michihiro Shintani and Takashi Sato, “An Adaptive Current-Threshold Determination for IDDQ Testing Based on Bayesian Process Parameter Estimation,” ACM/IEEE Asia South Pacific Design Automation Conference (ASP-DAC) (Pacifico Yokohama, Yokohama, Japan), Jan. 2013 (to appear).
  • Tetsuro Miyakawa, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Realization of Frequency-Domain Circuit Analysis Through Random Walk,” ACM/IEEE Asia South Pacific Design Automation Conference (ASP-DAC) (Pacifico Yokohama, Yokohama, Japan), Jan. 2013 (to appear).
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DATE2013 papers accepted

The following two papers are accepted for presentation at DATE2013. According to the acceptance notification, only 206 papers out of 829 reviewed submissions were selected for either “long” or “short” presentation at the conference, which means the acceptance ratio is 24.8%.

  • Takashi Imagawa, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “A Cost-Effective Selective TMR for Heterogeneous Coarse-Grained Reconfigurable Architectures Based on DFG-Level Vulnerability Analysis,” DATE 2013 (Grenoble, France), Mar. 2013 (to appear), short presentation.
  • Zoltan Endre Rakosi, Masayuki Hiromoto, Hiroshi Tsutsui, Takashi Sato, Yukihiro Nakamura, and Hiroyuki Ochi, “Hot-Swapping Architecture with Back-Biased Testing for Mitigation of Permanent Faults in Functional Unit Array,” DATE 2013 (Grenoble, France), Mar. 2013 (to appear), long presentation.
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VMC2012

On November 8th, Prof. Sato presented the following work (poster presentation) at VMC2012 (IEEE/ACM Workshop on Variability Modeling and Characterization 2012), which was held in San Jose, CA.

  • Michihiro Shintani and Takashi Sato, “Adaptive Current-Threshold Determination for Accurate IDDQ Testing,” IEEE/ACM Workshop on Variability Modeling and Characterization (VMC2012), November 2012.
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EPEPS2012 (2012/10/22-24)

We presented the following work at EPEPS2012 (21st Conference on Electrical Performance of Electronic Packaging and Systems), which was held in Tempe Mission Palms Hotel, Tempe, AZ, from Oct. 22 to 24. This work is a collaborative research with Murata Manufacturing Co., Ltd.

  • Koh Yamanaga and Takashi Sato, “The odd couple: antiresonance control by two capacitors of unequal series resistances,” IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems, pp. 256-259, October 2012.
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Accepted for publication in IEICE Transactions on Information and Systems

The following paper has been accepted for publication in IEICE Transactions on Information and Systems.

  • Michihiro Shintani and Takashi Sato, “Device-Parameter Estimation
    Through IDDQ Signatures,” IEICE Transactions on Information and Systems. (to appear)
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Trip to Toba and Ise

The annual excursion this year was to Toba and Ise area (Mie Prefecture). We visited Meoto Iwa, Toba Aquarium, and Ise Grand Shrine.

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Baseball tournament

On September 12th (Wed), the 2012 Electrical and Electronic Engineering Baseball Tournament was held at Kyoto Gosho Ground.
Takashi Sato Lab. played against Takahashi Lab. and lost.

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Prize from DA Symposium 2011

At the IPSJ DA Symposium 2012, Mr. Katayama, who was a master course student, has been awarded a Student Presentation Award (優秀発表学生賞) for his paper presented in the DA Symposium 2011.

  • Kentaro Katayama, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Sequential Importance Sampling for Yield Estimation of Circuits with Multiple Failure Regions,” in Proc. of IPSJ DA Symposium 2011, Aug. 2011 (in Japanese).
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DA Symposium 2012

Mr. Shimizu presented his work at the IPSJ DA Symposium 2012 held at Hotel Gero onsen Suimeikan, August 29 to 30.

  • Hirofumi Shimizu, Hiromitsu Awano, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Estimation of Model Parameters for Random Telegraph Noise Based on Information Criterion,” in Proc. of IPSJ DA Symposium 2012, Aug. 2012 (in Japanese).
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