Index

• Journal papers
  • Journal papers 04/2011-03/2012 (number of articles: 1)
• Conference or workshop papers (w/review)
  • Conference or workshop papers (w/review) 04/2011-03/2012 (number of articles: 13)
• Workshop or convention (w/o review)
  • Workshop or convention (w/o review) 04/2011-03/2012 (number of articles: 12)

Journal papers 04/2011-03/2012 (number of articles: 1)

• Ryusuke Miyamoto, Hiroki Sugano, Hiroyuki Ochi, and Yukihiro Nakamura:
  "Hardware Accelerator for Robust Object Tracking Using a Cascade Particle Filter," Journal of Signal Processing, Vol.15, No.3, pp.215-223, May 2011.
  
  

Conference or workshop papers (w/review) 04/2011-03/2012 (number of articles: 13)

• Tetsuro Miyakawa, Koh Yamanaga, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato:
  "Acceleration of Random-Walk-Based Linear Circuit Analysis Using Importance Sampling," in Proc. of GLSVLSI 2011 (Lausanne, Switzerland), pp.211-216, May 2011.
  DOI: 10.1145/1973009.1973051
  
  
• Takashi Sato, Tadamichi Kozaki, Takumi Uezono, Hiroshi Tsutsui, and Hiroyuki Ochi:
  "A Stress-Parallelized Device Array for Efficient Bias-Temperature Stability Measurement," in Proc. of IEEE International Workshop on Design for Manufacturability and Yield 2011 (DFM&Y) (San Diego Convention Center, San Diego, California, USA), pp.19-22, June 2011.
  
  
• Takashi Imagawa, Hiroshi Yuasa, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato:
  "An Optimization Method of Selective TMR for Coarse-Grained Reconfigurable Architecutres Using Reliability Model of Routing Resources," in Proc. of IPSJ DA Symposium 2011, Aug. 2011 (in Japanese).
  
  
• Junya Kawashima, Hiroyuki Ochi, Hiroshi Tsutsui, and Takashi Sato:
  "A Design Strategy for Subthreshold Circuits Considering Energy-Minimization and Yield-Maximization," in Proc. of Workshop on Circuits and Systems, pp.401-406, Aug. 2011 (in Japanese).
  
  
• Kentaro Katayama, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato:
  "Sequential Importance Sampling for Yield Estimation of Circuits with Multiple Failure Regions," in Proc. of IPSJ DA Symposium 2011, Aug. 2011 (in Japanese).
  
  
• Junya Kawashima, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato:
  "A Design Strategy for Sub-Threshold Circuits Considering Energy-Minimization and Yield-Maximization," in Proc. of IEEE International SOC Conference (SOCC) (Taipei, Taiwan), pp.57-62, Sep. 2011. [IEEE Kansai Section Student Paper Award]
  DOI: 10.1109/SOCC.2011.6085076
  
  
• Takashi Sato, Tadamichi Kozaki, Takumi Uezono, Hiroshi Tsutsui, and Hiroyuki Ochi:
  "A Device Array for Efficient Bias-Temperature Instability Measurements," in Proc. of European Solid-State Device Research Conference (ESSDERC) (Finlandia Hall, Helsinki, Finland), pp.143-146, Sep. 2011.
  DOI: 10.1109/ESSDERC.2011.6044214
  
  
• Jyothi Bhaskarr Velamala, Takashi Sato, and Yu Cao:
  "Statistical Aging Prediction and Characterization Using Trapping/detrapping Based NBTI Models," in Proc. of Workshop on Variability Modeling and Characterization (VMC) (San Jose, CA), p.11, Nov. 2011.
  
  
• Michihiro Shintani and Takashi Sato:
  "Getting the Most Out of IDDQ Testing," in Proc. of Workshop on Variability Modeling and Characterization (VMC) (San Jose, CA), p.8, Nov. 2011.
  
  
• Hiroshi Yuasa, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato:
  "Acceleration Scheme for Monte Carlo Based SSTA Using Generalized STA Processing Element," in Proc. of ACM/IEEE International Workshop on Timing Issues (TAU) (Taipei, Taiwan), Jan. 2012.
  
  
• Hiroshi Yuasa, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato:
  "Hardware Architecture for Accelerating Monte Carlo Based SSTA Using Generalized STA Processing Element," in Proc. of the 17th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI2012) (B-con Plaza, Beppu, Oita, Japan), pp.205-210, Mar. 2012.
  
  
• Takashi Imagawa, Takahiro Oue, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato:
  "GPU Acceleration of Cycle-Based Soft-Error Simulation for Reconfigurable Array Architectures," in Proc. of the 17th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI2012) (B-con Plaza, Beppu, Oita, Japan), pp.88-93, Mar. 2012.
  
  
• Takashi Sato, Hiromitsu Awano, Hirofumi Shimizu, Hiroshi Tsutsui, and Hiroyuki Ochi:
  "Statistical Observations of NBTI-Induced Threshold Voltage Shifts on Small Channel-Area Devices," in Proc. of International Symposium on Quality Electrical Design (ISQED) (Santa Clara, CA), pp.306-311, Mar. 2012.
  DOI: 10.1109/ISQED.2012.6187510
  
  

Workshop or convention (w/o review) 04/2011-03/2012 (number of articles: 12)

• Satoshi Yoshikawa, Hiroshi Tsutsui, Hiroyuki Okuhata, and Takao Onoye:
  "An Approach to Halo Suppression for Retinex-Based Image Enhancement," IEICE Technical Report, Vol.111, No.78, SIS2011-18, pp.93-98, June 2011 (in Japanese).
  
  
• Tatsuo Maeno, Hiroshi Tsutsui, and Takao Onoye:
  "Quality Evaluation of an Inpainting-Based Deinterlacing Scheme," IEICE Technical Report, Vol.111, No.78, SIS2011-19, pp.99-104, June 2011 (in Japanese).
  
  
• Tsuyoshi Sakata, Yasufumi Nariki, Takaaki Okumura, Toshiki Kanamoto, Hiroo Masuda, Takashi Sato, Masanori Hashimoto, Katsuhiro Furukawa, Masakazu Tanaka, and Toshiki Yamanaka:
  "Variability Analysis of Delay Degradation on CMOS Driver Circuit Due to NBTI Effect," in Proc. of IPSJ DA Symposium 2011, pp.195-200, Aug. 2011 (in Japanese).
  
  
• Zhi Li, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato:
  "A Sensor-Based Self-Adjustment Approach for Controlling I/O Buffer Impedance," in Proc. of IEICE Society Conference (Sapporo, Japan), C-12-45, p.120, Sep. 2011.
  
  
• Takumi Morishita, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato:
  "A GPU Implementation of Jacobi Method for Power Grid Analysis," IEICE Society Conference, A-3-10, p.84, Sep. 2011 (in Japanese).
  
  
• Hirofumi Shimizu, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato:
  "An Automated Estimation of MOS Transistors' Interface-State Numbers Using EM Algorithm," IEICE Society Conference, C-12-18, p.93, Sep. 2011 (in Japanese).
  
  
• Hiromitsu Awano, Hirofumi Shimizu, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato:
  "A Study on Parameter Estimation for Modeling of Random-Telegraph Noise," IEICE Technical Report, Vol.111, No.324, VLD2011-66, DC2011-42, pp.85-90, Nov. 2011 (in Japanese).
  
  
• Tetsuro Miyakawa, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato:
  "Random-Walk Based Transient Analysis for Linear Circuits Using Quasi-Zero-Variance Importance Sampling," IEICE Technical Report, Vol.111, No.324, VLD2011-64, DC2011-40, pp.73-78, Nov. 2011 (in Japanese).
  
  
• Takumi Morishita, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato:
  "An Acceleration Method for Power Grid Analysis Using Block-Iterative Algorithm," IEICE Technical Report, Vol.111, No.324, VLD2011-63, DC2011-39, pp.67-71, Nov. 2011 (in Japanese).
  
  
• Michihiro Shintani and Takashi Sato:
  "An Approach for Adaptive Determination of IDDQ Testing Criteria Based on Process Parameter Estimation," IEICE Technical Report, pp.49-54, Feb. 2012 (in Japanese).
  
  
• Koh Yamanaga and Takashi Sato:
  "Combinatorial Use of Low and High-Series Resistance Capacitors for Reducing Impedance of Power Supply Network," Japan Institute of Electronics Packaging, Mar. 2012 (in Japanese).
  
  
• Michihiro Shintani and Takashi Sato:
  "Global Process Parameter Estimation Using IDDQ Current Signature," IEICE Technical Report, pp.1-6, Mar. 2012 (in Japanese).
  
  

generated at 2022/07/21 15:05:32