Tag Archives: IPSJ

Design Gaia 2012

Posted on 11/27/12 Tuesday by admin

李志同学（修士课程2年级）在2012 VLD研究会做了研究发表，以下是研究题目。 Zhi Li, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Accurate I/O Buffer Impedance Self-Adjustment using Vth and Temperature Sensors,” IEICE Technical Report, Vol.112, No.320, VLD2012-79, DC2012-45, pp.117-122, Nov. 2012.

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获得 “DA Symposium 2011 優秀発表学生賞”

Posted on 09/03/12 Monday by admin

DA Symposium 2012发表会中，毕业生片山先生在DA Symposium 2011上的研究发表(发表题目如下)荣获 “DA Symposium 2011 優秀発表学生賞”, 并接受了颁奖。 Kentaro Katayama, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Sequential Importance Sampling for Yield Estimation of Circuits with Multiple Failure Regions,” in Proc. of IPSJ DA Symposium 2011, Aug. 2011 … Continue reading →

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DA Symposium 2012

Posted on 08/31/12 Friday by admin

2012年8月29日〜30日在ホテル下呂温泉水明館举办的DA Symposium 2012上，研究生清水同学发表了自己的研究成果（发表题目如下）。 Hirofumi Shimizu, Hiromitsu Awano, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Estimation of Model Parameters for Random Telegraph Noise Based on Information Criterion,” in Proc. of IPSJ DA Symposium 2012, Aug. 2012 (in Japanese).

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