Dr. Shintani and Mr. Oishi presented their papers at the IEEE Workshop on Wide Bandgap Power Devices and Applications (WiPDA) held in Fayetteville, AR, USA.
Dr. Shintani’s presentation was about a circuit simulation model for V-groove SiC power MOSFET with buried P-layers. By burying the P-layers, the reliability of the V-groove SiC power MOSFET is dramatically improved. In this work, a circuit simulation model for V-groove SiC power MOSFET with buried P-layers is proposed. From results of the process simulations, the voltage dependency of the capacitance characteristics is accurately modeled. Through experiments using a V-groove SiC MOSFET with buried P-layers, it is demonstrated that the proposed model successfully reproduces static characteristics.
Mr. Oishi’s presentation was about measurement of thermal circuit of power MOSFETs. We have proposed two measurement techniques. In the presentation, the two methods are validated by the comparison between each of the methods’ result. Furthermore, the advantages and disadvantages of each technique are discussed.
- Michihiro Shintani, Kazuki Oishi, Rui Zhou, Masayuki Hiromoto, and Takashi Sato:
“A Circuit Simulation Model for V-Groove SiC Power MOSFET,” in Proc. of the 4th IEEE Workshop on Wide Bandgap Power Devices and Applications (WiPDA), pp.286-290, Nov. 2016. - Kazuki Oishi, Michihiro Shintani, Masayuki Hiromoto, and Takashi Sato:
“Identifications of Thermal Equivalent Circuit for Power MOSFETs through In-Situ Channel Temperature Estimation,” in Proc. of the 4th IEEE Workshop on Wide Bandgap Power Devices and Applications (WiPDA), pp.308-313, Nov. 2016.
