The following papers are accepted for publication in TAU workshop 2016, congratulations!
- Hiromitsu Awano and Takashi Sato:
“Efficient Transistor-Level Timing Yield Estimation via Line Sampling,” in Proc. of ACM/IEEE International Workshop on Timing Issues (TAU) (Santa Rosa, CA), Mar. 2016 (to appear). - Song Bian, Michihiro Shintani, Zheng Wang, Masayuki Hiromoto, Anupam Chattopadhyay, and Takashi Sato:
“Mitigation of NBTI-Induced Timing Degradation in Processor,” in Proc. of ACM/IEEE International Workshop on Timing Issues (TAU) (Santa Rosa, CA), Mar. 2016 (to appear).