The following paper has been published on the January issue of Trans. IEICE(Kyoto University repository).
This was a joint work with Murata Manufacturing, Co. Ltd., Tokyo Institute of Technology, and our group in Kyoto University.
- Koh Yamanaga, Shiho Hagiwara, Ryo Takahashi, Kazuya Masu, and Takashi Sato, “State-Dependence of On-Chip Power Distribution Network Capacitance,” IEICE Transactions on Electronics, Vol.E97-C, No.1, pp.77-84.
-
- An array circuit of 8,000 NAND gates