Monthly Archives: February 2018

A paper accepted for publication in IEICE journal

Posted on Wednesday February 28th, 2018 by hiromoto

The following paper has been accepted for publication in IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. Masayuki Hiromoto, Motoki Yoshinaga, and Takashi Sato: “MRO-PUF: Physically Unclonable Function with Enhanced Resistance against Machine Learning Attacks Utilizing Instantaneous Output … Continue reading →

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(日本語) 3回生（研究室配属対象者）向け研究室見学会開催

Posted on Wednesday February 21st, 2018 by hiromoto

Sorry, this entry is only available in 日本語.

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Paper Published on IEICE Transactions on Information and Systems

Posted on Monday February 12th, 2018 by hiromoto

The following paper has been published on IEICE Transactions on Information and Systems. An area-efficient FPGA-based annealing processor that is based on Ising model is proposed. The proposed processor eliminates random number generators (RNGs) and temperature schedulers, which are the … Continue reading →

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(日本語) DAC2018採択決定

Posted on Friday February 9th, 2018 by ts

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Paper accepted for publication in IEEE Transactions on Power Electronics

Posted on Sunday February 4th, 2018 by hiromoto

The following paper has been accepted for publication in IEEE Transactions on Power Electronics (TPEL). Michihiro Shintani, Yohei Nakamura, Kazuki Oishi, Masayuki Hiromoto, Takashi Hikihara, and Takashi Sato: “Surface-Potential-Based Silicon Carbide Power MOSFET Model for Circuit Simulation,” IEEE Transactions on … Continue reading →

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