Monthly Archives: September 2014

40th PARTHENON Workshop

Posted on Tuesday September 30th, 2014 by hiromoto

The 40th PARTHENON Workshop was hold on September 29, 2014 in Yoshida Campus, Kyoto University. In the conference, Takashi Imagawa (D3) and Tsuyoshi Okazaki (M2) made presentations. In addition, emeritus Professor Yukihiro Nakamura, made a special speech entitled “The 22-year … Continue reading →

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IEICE Society Conference 2014

Posted on Sunday September 28th, 2014 by hiromoto

Motoki Yoshinaga (B4) presented his research at the IEICE Society Conference 2014 hold on Sept. 23~26, 2014 at the University of Tokushima, Tokushima. His presentation is on the ways of identifying counterfeit IC chips. The circulation of counterfeit IC chips … Continue reading →

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2014 Graduate Degree Conferment

Posted on Saturday September 27th, 2014 by admin

On 24th September (Wed), degrees for graduate-school students were conferred. A commemorative photo was taken in front of the entrance of old EE building, as usual.

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Lab trip 2014

Posted on Saturday September 27th, 2014 by admin

The lab went for a two days and one night travel on September 15th to 16th to Himeji, Nishiwaki and Kobe. The lab members touched on the long history of the world heritage Hakuro (Himeji) Castle who had just finished … Continue reading →

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2014 EE Deparment Baseball Competition (First Game)

Posted on Monday September 22nd, 2014 by hiromoto

On September 19th (Fri), the first game of 2014 EE Baseball Competition was hold at Kyoto Gosho Ground. Sato Lab was up against the Sano-Nakamura-Mizuuchi-Nagasaki Lab Union. An extensive game was carried out, and in the end, unfortunately, Sato Lab … Continue reading →

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Paper Published on IEEE Transactions on Device and Materials Reliability

Posted on Thursday September 18th, 2014 by admin

The following article has been published on IEEE Transactions on Device and Materials Reliability. Hiromitsu Awano, Masayuki Hiromoto and Takashi Sato, “BTIarray: A Time-overlapping Transistor Array for Efficient Statistical Characterization of Bias Temperature Instability,” IEEE Transactions on Device and Materials … Continue reading →

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DA Symposium 2014

Posted on Monday September 1st, 2014 by hiromoto

Hiromitsu Awano (D2) gave a presentation at DA Symposium 2014 (in Gero, Gifu) on the long-term reliability of VLSI circuits. The symposium was hold on August 28~29th, 2014, and the presentation was given on 28th August, 2014. As process technology … Continue reading →

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Excellent Student Presentation Awards from IPSJ SLDM Technical Commitee

Posted on Monday September 1st, 2014 by hiromoto

Hiromitsu Awano (D2) and Yoshihiko Sagawa (M2) was awarded the “IPSJ DA Symposium 2013 Excellent Student Presentation Award” and “IPSJ 166th SLDM Workshop Excellent Student Presentation Award,” respectively. The following articles are only available in Japanese: 粟野 皓光, 佐藤 高史: … Continue reading →

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