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Monthly Archives: November 2013
VMC2013
On Nov. 21, Mr. Awano presented his recent work on long term reliability of VLSI circuits at VMC2013 held in San Jose. Bias temperature instability (BTI) is considered to have significant impact on long term reliability of VLSI. At the … Continue reading
ASICON 2013
Prof. Sato gave a talk in ASICON 2013, which is held on Oct.28-31, 2013, in Shenzhen, China. Takashi Sato, “Statistical simulation methods for analyzing performance of low supply voltage circuits (invited),” in Proc. IEEE 10th International Conference on ASIC (ASICON), … Continue reading
IEEE transaction paper (TED) has been published
A paper has been just published in the November issue of IEEE Transactions on Electron Devices. J.B. Velamala, K.B. Sutaria, H. Shimizu, H. Awano, T. Sato, G. Wirth, and Y. Cao, “Compact Modeling of Statistical BTI Under Trapping/Detrapping,” IEEE Transactions … Continue reading
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