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The following papers are published on IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Special Section on “VLSI Design and CAD Algorithms”. Hiromitsu Awano, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Bayesian Estimation of Multi-Trap RTN Parameters using … Continue reading
Year-end party will be held on 25th December from 7 p.m. at Kyoto Kiyamachi. Prof. Yukihiro Nakamura as well as current members of our laboratory will attend the party. If you are an alumnus and can attend the party, please contact us … Continue reading
The following two papers has been accepted for publication in IEICE Transactions on Electronics, Special Section on Solid-State Circuit Design – Architecture, Circuit, Device and Design Methodology. Hiroshi Yuasa, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Parallel Acceleration Scheme for Monte … Continue reading
On 5th 2012, Assistant Professor Tsutsui presented the following work at Asia-Pacific Signal and Information Processing Association (APSIPA) Annual Summit and Conference (ASC) 2012, which was held in Hollywood, LA from 3rd to 6th, 2012. Hiroshi Tsutsui, Satoshi Yoshikawa, Hiroyuki Okuhata, and … Continue reading
We have gave a poster presentation at JST International Symposium on Dependable VLSI Systems 2012 which was held on 1st 2012 at Fujisoft Akiba Plaza 5F Akiba Hall. The theme of this research is “dependable VLSI platform using robust fabrics“, whose principal investigator … Continue reading
Zhi Li (master course 2nd degree) has made a presentation about his work at Design Gaia 2012. Zhi Li, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Accurate I/O Buffer Impedance Self-Adjustment using Vth and Temperature Sensors,” IEICE Technical Report, Vol.112, No.320, … Continue reading
The following two papers are accepted for presentation at ISQED2013, which will be held at Santa Clara in March 2013. Hiromitsu Awano, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Multi-Trap RTN Parameter Extraction Based on Bayesian Inference,” International Symposium on Quality … Continue reading
The following two papers will appear in proceedings of ASP-DAC 2013. Michihiro Shintani and Takashi Sato, “An Adaptive Current-Threshold Determination for IDDQ Testing Based on Bayesian Process Parameter Estimation,” ACM/IEEE Asia South Pacific Design Automation Conference (ASP-DAC) (Pacifico Yokohama, Yokohama, Japan), … Continue reading