Tag Archives: IEICE

Design Gaia 2012

Posted on 11/27/12 Tuesday by admin

李志同学（修士课程2年级）在2012 VLD研究会做了研究发表，以下是研究题目。 Zhi Li, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Accurate I/O Buffer Impedance Self-Adjustment using Vth and Temperature Sensors,” IEICE Technical Report, Vol.112, No.320, VLD2012-79, DC2012-45, pp.117-122, Nov. 2012.

Posted in Conference/Workshop | Tagged , , , | Comments Off on Design Gaia 2012

IEICE Transactions on Information and Systems论文采用

Posted on 10/24/12 Wednesday by admin

新谷同学（博士课程2年级）的以下研究成果被IEICE Transactions on Information and Systems决定采用。 Michihiro Shintani and Takashi Sato, “Device-Parameter Estimation Through IDDQ Signatures,” IEICE Transactions on Information and Systems. (to appear)

Posted in Publication | Tagged , | Comments Off on IEICE Transactions on Information and Systems论文采用

第25届 Workshop on Circuits and Systems 在淡路岛梦舞台国际会议中心举办

Posted on 07/31/12 Tuesday by admin

2012年7月30日〜31日在淡路岛梦舞台国际会议中心举办的第25届 Workshop on Circuits and Systems中，修士二年级的森下同学，川島同学发表了自己的研究成果。 Takumi Morishita, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Fast GPU Implementations of Krylov Subspace Methods for Power Grid Analysis,” in Proc. of Workshop on Circuits and Systems, pp.432-437, July 2012 (in Japanese). Junya Kawashima, … Continue reading →

Posted in Conference/Workshop | Tagged , | Comments Off on 第25届 Workshop on Circuits and Systems 在淡路岛梦舞台国际会议中心举办

荣获 “第24届 电路与系统研究会 奨励賞”

Posted on 07/30/12 Monday by admin

在第25届 Workshop on Circuits and Systems中， 修士二年级的川島同学在前一届研究会上的研究发表获得了“第24回 回路とシステムワークショップ 奨励賞”，并在本届研究会上接受了颁奖。 Junya Kawashima, Hiroyuki Ochi, Hiroshi Tsutsui, and Takashi Sato, “A Design Strategy for Subthreshold Circuits Considering Energy-Minimization and Yield-Maximization,” in Proc. of Workshop on Circuits and Systems, pp.401-406, Aug. 2011 (in Japanese).

Posted in Announcement, Award | Tagged , , | Comments Off on 荣获 “第24届 电路与系统研究会 奨励賞”

两篇研究论文在IEICE Trans. Fundamentals, Special Section on “VLSI Design and CAD Algorithms”上被刊登

Posted on 07/29/12 Sunday by admin

修士二年级的粟野同学和川島同学的研究成果被IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Special Section on “VLSI Design and CAD Algorithms” (December 2012 Issue) 刊登。 Hiromitsu Awano, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Bayesian Estimation of Multi-Trap RTN Parameters using Markov Chain … Continue reading →

Posted in Publication | Tagged , | Comments Off on 两篇研究论文在IEICE Trans. Fundamentals, Special Section on “VLSI Design and CAD Algorithms”上被刊登

IEICE Trans. Fundamentals, Special Section on “VLSI Design and CAD Algorithms” への採録決定

Posted on 07/29/12 Sunday by admin

修士二年级的粟野同学和川島同学的研究成果被IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Special Section on “VLSI Design and CAD Algorithms” (December 2012 Issue) 刊登。 Hiromitsu Awano, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Bayesian Estimation of Multi-Trap RTN Parameters using Markov Chain … Continue reading →

Posted in Publication | Tagged , | Comments Off on IEICE Trans. Fundamentals, Special Section on “VLSI Design and CAD Algorithms” への採録決定

Smart Info-Media System(SIS)研究会(6/14-15)在带广市Ukati Plaza 举行

Posted on 06/18/12 Monday by admin

2012年6月14日〜15日，在带广市Ukati Plaza 举行的Smart Info-Media System(SIS)研究会上，筒井助教做了研究成果发表。 前野 達生, 筒井 弘, 尾上 孝雄, “動き検出履歴とコスト最適化に基づくデインタレース手法に関する検討”, 電子情報通信学会技術研究報告, Vol.112, No.78, SIS2012-15, pp.77-82, 2012年6月.

Posted in Conference/Workshop | Tagged , | Comments Off on Smart Info-Media System(SIS)研究会(6/14-15)在带广市Ukati Plaza 举行

2011年 所有参加的学会

Posted on 03/29/12 Thursday by admin

2011年03月14日～03月16日，ISQED(The International Symposium on Quality Electronic Design) Symposium 2011在美利坚合众国加利福尼亚州Santa Clara，Hyatt Regency Hotel举行，M1(当時)湯浅同学进行了研究成果发表。 Hiroshi Yuasa, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato: “A Fully Pipelined Implementation of Monte Carlo Based SSTA on FPGAs,” in Proc. of International Symposium on Quality Electrical … Continue reading →

Posted in Conference/Workshop | Tagged , , , , , , | Comments Off on 2011年 所有参加的学会