Tag Archives: IEICE

Design Gaia 2012

Posted on Tuesday November 27th, 2012 by admin

Zhi Li (master course 2nd degree) has made a presentation about his work at Design Gaia 2012. Zhi Li, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Accurate I/O Buffer Impedance Self-Adjustment using Vth and Temperature Sensors,” IEICE Technical Report, Vol.112, No.320, … Continue reading →

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Accepted for publication in IEICE Transactions on Information and Systems

Posted on Wednesday October 24th, 2012 by admin

The following paper has been accepted for publication in IEICE Transactions on Information and Systems. Michihiro Shintani and Takashi Sato, “Device-Parameter Estimation Through IDDQ Signatures,” IEICE Transactions on Information and Systems. (to appear)

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The 25th Workshop on Circuits and Systems @Awaji Yumebutai International Conference Center

Posted on Tuesday July 31st, 2012 by admin

On July 30th, Mr. Morishita and Mr. Kawashima, who are master course students, have presented their works at the 25th Workshop on Circuits and Systems held at Awaji Yumebutai International Conference Center. Takumi Morishita, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi … Continue reading →

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Encouraging Prize from the 24th Workshop on Circuits and Systems

Posted on Monday July 30th, 2012 by admin

At the 25th Workshop on Circuits and System, Mr Kawashima, a second year graduate student, has been awarded an encouraging prize with respect to his following work presented in the same conference last year. Junya Kawashima, Hiroyuki Ochi, Hiroshi Tsutsui, and … Continue reading →

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Papers accepted for publication in IEICE Trans. Fundamentals, Special Section on “VLSI Design and CAD Algorithms”

Posted on Sunday July 29th, 2012 by admin

The following two papers have been accepted for publication in IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Special Section on “VLSI Design and CAD Algorithms”, December 2012 Issue. Hiromitsu Awano, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Bayesian … Continue reading →

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IEICE Trans. Fundamentals, Special Section on “VLSI Design and CAD Algorithms” への採録決定

Posted on Sunday July 29th, 2012 by admin

The following two papers have been accepted for publication in IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Special Section on “VLSI Design and CAD Algorithms”, December 2012 Issue. Hiromitsu Awano, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Bayesian … Continue reading →

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スマートインフォメディアシステム(SIS)研究会(6/14-15)@帯広市とかちプラザ

Posted on Monday June 18th, 2012 by admin

2012年6月14日〜15日に帯広市とかちプラザにて開催されたスマートインフォメディアシステム(SIS)研究会にて筒井(助教)が研究成果を発表しました． 前野 達生, 筒井 弘, 尾上 孝雄, “動き検出履歴とコスト最適化に基づくデインタレース手法に関する検討”, 電子情報通信学会技術研究報告, Vol.112, No.78, SIS2012-15, pp.77-82, 2012年6月.

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参加学会2011年

Posted on Thursday March 29th, 2012 by admin

2011年03月14日～03月16日に，アメリカ合衆国・カリフォルニア州Santa Clara，Hyatt Regency HotelにてISQED(The International Symposium on Quality Electronic Design) Symposium 2011が開催され，M1(当時)の湯浅君が発表を行いました． Hiroshi Yuasa, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato: “A Fully Pipelined Implementation of Monte Carlo Based SSTA on FPGAs,” in Proc. of International Symposium on Quality Electrical … Continue reading →

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