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May 2025 M T W T F S S « Apr 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Archives
Tag Archives: IEEE
Papers accepted for presentation in WiPDA 2016
The following papers have been accepted for presentation in WiPDA (the 4th IEEE Workshop on Wide Bandgap Power Devices and Applications). Michihiro Shintani, Kazuki Oishi, Rui Zhou, Masayuki Hiromoto, and Takashi Sato: “A Circuit Simulation Model for V-Groove SiC Power … Continue reading
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Paper accepted for presentation in ASP-DAC 2017
The following paper has been accepted for presentation in ASP-DAC 2017 (Asia and South Pacific Design Automation Conference). Acceptance rate 31%=111/358. Hiromitsu Awano, Masayuki Hiromoto, and Takashi Sato: “Efficient Circuit Failure Probability Calculation Along Product Lifetime Considering Device Aging,” 22nd … Continue reading
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(日本語) CVPRW/EVW2016
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A paper presented at DAC2016
Dr. Awano presented a paper in Design Automation Conference (DAC) 2016 held in Austin, Tx. His talk is about the accelerated calculation of timing yield of logic circuits. By introducing the idea of Line sampling to the timing analysis, simulations … Continue reading
SISPAD2016: paper accepted
The paper below has been accepted for presentation in International Conference on Simulation of Semiconductor Processes and Devices (SISPAD). This is a joint work with laboratory of Advanced Electrical Systems Theory, Department of Electrical Engineering at Kyoto University. Yohei Nakamura, … Continue reading
ISCAS2016
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Student paper presented at GLSVLSI 2016
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Student paper accepted for presentation in CVPRW 2016
The following paper has been accepted for presentation in CVPRW/EVW2016 (IEEE Conference on Computer Vision and Pattern Recognition Workshops/The Twelfth IEEE Embedded Vision Workshop). Takayuki Ujiie, Masayuki Hiromoto, and Takashi Sato: “Approximated Prediction Strategy for Reducing Power Consumption of Convolutional … Continue reading
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(日本語) VMC2015
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(日本語) IEEE Student Branch Leadership Training Workshop
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