Tag Archives: IEICE

A paper has been accepted in January issue of IEICE Transactions on Electronics

Posted on Friday October 25th, 2013 by ts

The following paper has been accepted in the IEICE Transactions on Electronics. Koh Yamanaga, Shiho Hagiwara, Ryo Takahashi, Kazuya Masu, and Takashi Sato, “State-Dependence of On-Chip Power Distribution Network Capacitance: Measurement and Analysis, to appear in IEICE Transactions on Electronics, … Continue reading →

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(日本語) 電子情報通信学会 集積回路研究会(ICD)

Posted on Tuesday July 9th, 2013 by admin

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Journal papers published on Trans. IEICE

Posted on Friday April 26th, 2013 by ts

The following papers are published on Trans. IEICE. Hiroshi Yuasa, Hiroshi Tsutsui, Hiroyuki Ochi and Takashi Sato, “Parallel acceleration scheme for Monte Carlo based SSTA using generalized STA processing element,” IEICE Transactions on Electronics, Vol.E96-C, No.4, pp.473-481, April, 2013. (Kyoto … Continue reading →

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IEICE General Conference　2013

Posted on Friday March 22nd, 2013 by admin

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(日本語) 環境電磁工学研究会 (EMCJ)

Posted on Wednesday March 13th, 2013 by admin

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VLD Excellent Student Author Award for ASP-DAC

Posted on Thursday March 7th, 2013 by admin

On March 4th, at Okinawa, Mr. Shintani received the VLD Excellent Student Author Award for ASP-DAC. This award is given to the student who presented an influencial paper in ACM/IEEE Asia South Pacific Design Automation Conference (ASP-DAC). The prize paper … Continue reading →

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(日本語) VLSI設計技術研究会 (VLD)

Posted on Thursday March 7th, 2013 by admin

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Journal papers published on Trans. IEICE

Posted on Monday December 31st, 2012 by admin

The following papers are published on IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Special Section on “VLSI Design and CAD Algorithms”. Hiromitsu Awano, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Bayesian Estimation of Multi-Trap RTN Parameters using … Continue reading →

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2012 ICD Conference

Posted on Thursday December 20th, 2012 by admin

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Accepted for publication in IEICE Transactions on Electronics, Special Section on Solid-State Circuit Design – Architecture, Circuit, Device and Design Methodology

Posted on Wednesday December 12th, 2012 by admin

The following two papers has been accepted for publication in IEICE Transactions on Electronics, Special Section on Solid-State Circuit Design – Architecture, Circuit, Device and Design Methodology. Hiroshi Yuasa, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Parallel Acceleration Scheme for Monte … Continue reading →

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