Tag Archives: IEEE

VMC2017

Posted on Monday November 20th, 2017 by ts

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Paper published in IEEE Trans. VLSI

Posted on Tuesday August 1st, 2017 by ts

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A paper presented at DAC2017

Posted on Wednesday June 28th, 2017 by hiromoto

Mr. Song Bian presented his paper in Design Automation Conference (DAC) 2017 held in Austin, Tx. Song’s presentation was on creating learning-based STA libraries for characterizing aging-induced device variations. Traditional approach to the accurate characterization of aging (specifically negative bias … Continue reading →

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Paper accepted for publication in IEEE Transactions on Biomedical Engineering

Posted on Sunday April 16th, 2017 by hiromoto

The following paper has been accepted for publication in IEEE Transactions on Biomedical Engineering (TBME). Yuya Fujita, Masayuki Hiromoto, and Takashi Sato: “PARHELIA: Particle Filter-Based Heart Rate Estimation from Photoplethysmographic Signals During Physical Exercise,” IEEE Transactions on Biomedical Engineering, 2017. … Continue reading →

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DATE 2017

Posted on Tuesday April 4th, 2017 by hiromoto

Mr. Song Bian presented his paper at Design, Automation and Test  in Europe (DATE) 2017 held in Lausanne, Switzerland. The acceptance rate of oral presentation is 24%. Song’s talk was on the realization of a secured content addressable memory (CAM) … Continue reading →

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APEC 2017

Posted on Tuesday April 4th, 2017 by hiromoto

Dr. Shintani presented his paper at IEEE Applied Power Electronics Conference and Exposition (APEC) 2017 held in Tampa, FL, USA. Dr. Shintani’s presentation was a pioneer work on the security of power devices. APEC is the leading conference in the … Continue reading →

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ICMTS 2017

Posted on Tuesday April 4th, 2017 by ts

Mr. Oishi presented his paper at International Conference on Microelectronic Test Structures (ICMTS) 2017 held in Grenoble, France. Mr. Oishi’s talk was about input capacitance measurement of power MOSFETs. The modeling of the input capacitance is crucial for the simulation … Continue reading →

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(日本語) 第13回IEEE関西支部学生研究奨励賞 受賞

Posted on Sunday February 26th, 2017 by hiromoto

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(日本語) IEEE PELS Japan Young Engineer Award 受賞

Posted on Monday February 20th, 2017 by hiromoto

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Student paper accepted for presentation in DAC 2017

Posted on Monday February 13th, 2017 by hiromoto

The following paper has been accepted for presentation in DAC 2017 (ACM/IEEE Design Automation Conference). Song Bian, Michihiro Shintani, Masayuki Hiromoto, and Takashi Sato: “LSTA: Learning-Based Static Timing Analysis for High-Dimensional Correlated On-Chip Variations,” in Proc. of ACM/IEEE Design Automation … Continue reading →

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