Tag Archives: Journal

A paper has been accepted for publication in IEICE Transactions

Posted on Monday January 6th, 2014 by ts

The following paper has been accepted for publication in IEICE Transactions on Electronics. Shiho Hagiwara, Takanori Date, Kazuya Masu, and Takashi Sato, “Hypersphere Sampling for Accelerating High-Dimension and Low-Failure Probability Circuit-Yield Analysis,” to appear in IEICE Transactions on Electronics.

Posted in Publication | Tagged , | Comments Off on A paper has been accepted for publication in IEICE Transactions

A journal paper has been published on Trans. IEICE

Posted on Wednesday January 1st, 2014 by ts

The following paper has been published on the January issue of Trans. IEICE(Kyoto University repository). This was a joint work with Murata Manufacturing, Co. Ltd., Tokyo Institute of Technology, and our group in Kyoto University.  Koh Yamanaga, Shiho Hagiwara, Ryo … Continue reading →

Posted in Publication | Tagged , | Comments Off on A journal paper has been published on Trans. IEICE

IEEE transaction paper (TED) has been published

Posted on Friday November 1st, 2013 by ts

A paper has been just published in the November issue of IEEE Transactions on Electron Devices. J.B. Velamala, K.B. Sutaria, H. Shimizu, H. Awano, T. Sato, G. Wirth, and Y. Cao, “Compact Modeling of Statistical BTI Under Trapping/Detrapping,”  IEEE Transactions … Continue reading →

Posted in Publication | Tagged , | Comments Off on IEEE transaction paper (TED) has been published

A paper has been accepted in January issue of IEICE Transactions on Electronics

Posted on Friday October 25th, 2013 by ts

The following paper has been accepted in the IEICE Transactions on Electronics. Koh Yamanaga, Shiho Hagiwara, Ryo Takahashi, Kazuya Masu, and Takashi Sato, “State-Dependence of On-Chip Power Distribution Network Capacitance: Measurement and Analysis, to appear in IEICE Transactions on Electronics, … Continue reading →

Posted in Publication | Tagged , | Comments Off on A paper has been accepted in January issue of IEICE Transactions on Electronics

Journal papers published on Trans. IEICE

Posted on Friday April 26th, 2013 by ts

The following papers are published on Trans. IEICE. Hiroshi Yuasa, Hiroshi Tsutsui, Hiroyuki Ochi and Takashi Sato, “Parallel acceleration scheme for Monte Carlo based SSTA using generalized STA processing element,” IEICE Transactions on Electronics, Vol.E96-C, No.4, pp.473-481, April, 2013. (Kyoto … Continue reading →

Posted in Publication | Tagged , | Comments Off on Journal papers published on Trans. IEICE

Journal papers published on Trans. IEICE

Posted on Monday December 31st, 2012 by admin

The following papers are published on IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Special Section on “VLSI Design and CAD Algorithms”. Hiromitsu Awano, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Bayesian Estimation of Multi-Trap RTN Parameters using … Continue reading →

Posted in Publication | Tagged , | Comments Off on Journal papers published on Trans. IEICE

Accepted for publication in IEICE Transactions on Electronics, Special Section on Solid-State Circuit Design – Architecture, Circuit, Device and Design Methodology

Posted on Wednesday December 12th, 2012 by admin

The following two papers has been accepted for publication in IEICE Transactions on Electronics, Special Section on Solid-State Circuit Design – Architecture, Circuit, Device and Design Methodology. Hiroshi Yuasa, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Parallel Acceleration Scheme for Monte … Continue reading →

Posted in Publication | Tagged , | Comments Off on Accepted for publication in IEICE Transactions on Electronics, Special Section on Solid-State Circuit Design – Architecture, Circuit, Device and Design Methodology

Accepted for publication in IEICE Transactions on Information and Systems

Posted on Wednesday October 24th, 2012 by admin

The following paper has been accepted for publication in IEICE Transactions on Information and Systems. Michihiro Shintani and Takashi Sato, “Device-Parameter Estimation Through IDDQ Signatures,” IEICE Transactions on Information and Systems. (to appear)

Posted in Publication | Tagged , | Comments Off on Accepted for publication in IEICE Transactions on Information and Systems

IEICE Trans. Fundamentals, Special Section on “VLSI Design and CAD Algorithms” への採録決定

Posted on Sunday July 29th, 2012 by admin

The following two papers have been accepted for publication in IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Special Section on “VLSI Design and CAD Algorithms”, December 2012 Issue. Hiromitsu Awano, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Bayesian … Continue reading →

Posted in Publication | Tagged , | Comments Off on IEICE Trans. Fundamentals, Special Section on “VLSI Design and CAD Algorithms” への採録決定

Papers accepted for publication in IEICE Trans. Fundamentals, Special Section on “VLSI Design and CAD Algorithms”

Posted on Sunday July 29th, 2012 by admin

The following two papers have been accepted for publication in IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Special Section on “VLSI Design and CAD Algorithms”, December 2012 Issue. Hiromitsu Awano, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Bayesian … Continue reading →

Posted in Publication | Tagged , | Comments Off on Papers accepted for publication in IEICE Trans. Fundamentals, Special Section on “VLSI Design and CAD Algorithms”