Tag Archives: IEICE

(日本語) 電子情報通信学会 シリコン材料・デバイス(SDM)研究会

Posted on Wednesday November 15th, 2017 by hiromoto

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(日本語) デザインガイア2017

Posted on Monday November 13th, 2017 by hiromoto

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Student paper accepted for publication in IEICE journal

Posted on Monday October 30th, 2017 by hiromoto

Following paper written by M2 student has been accepted for publication in IEICE Transactions on Information and Systems. Hidenori Gyoten, Masayuki Hiromoto, and Takashi Sato: “Area Efficient Annealing Processor for Ising Model without Random Number Generator,” IEICE Transactions on Information and … Continue reading →

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(日本語) 2017年 電子情報通信学会 ソサイエティ大会

Posted on Tuesday September 19th, 2017 by hiromoto

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Student paper accepted for publication in IEICE journal

Posted on Thursday August 17th, 2017 by hiromoto

Following paper written by D1 student has been accepted for publication in IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. Song Bian, Shumpei Morita, Michihiro Shintani, Hiromitsu Awano, Masayuki Hiromoto, and Takashi Sato: “Identification and Application of Invariant … Continue reading →

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Paper Published on IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

Posted on Wednesday July 19th, 2017 by hiromoto

The following paper has been published on IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. Replacement of highly stressed logic gates with internal node control (INC) logics is known to be an effective way to alleviate timing degradation … Continue reading →

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(日本語) 第29回 回路とシステムワークショップ 奨励賞 受賞

Posted on Wednesday May 17th, 2017 by hiromoto

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(日本語) 第30回 回路とシステムワークショップ＠北九州国際会議場

Posted on Wednesday May 17th, 2017 by hiromoto

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(日本語) 2017年 電子情報通信学会 総合大会

Posted on Tuesday April 4th, 2017 by hiromoto

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(日本語) 第30回 回路とシステムワークショップ 採択決定

Posted on Thursday March 16th, 2017 by hiromoto

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