Processor Architecture and Systems Synthesis Laboratory

The following papers have been accepted for presentation in VMC2016 (IEEE/ACM Workshop on Variability Modeling and Characterization).

• Michihiro Shintani, Kazuki Oishi, Rui Zhou, Masayuki Hiromoto, and Takashi Sato:
  “Unique Device Identification Framework for Power MOSFETs Using Inherent Device Variation,” in Proc. of IEEE/ACM Workshop on Variability Modeling and Characterization (VMC) (Austin, TX), Nov. 2016 (to appear).
• Shumpei Morita, Song Bian, Michihiro Shintani, Masayuki Hiromoto, and Takashi Sato:
  “Representative Path Approach for Time-Efficient NBTI Mitigation Logic Replacement,” in Proc. of IEEE/ACM Workshop on Variability Modeling and Characterization (VMC) (Austin, TX), Nov. 2016 (to appear).

The following paper has been accepted for presentation in APEC2017 (the 32nd Annual IEEE Applied Power Electronics Conference & Exposition).

• Michihiro Shintani, Kazuki Oishi, Rui Zhou, Masayuki Hiromoto, and Takashi Sato:
  “Device Identification from Mixture of Measurable Characteristics,” in Proc. of the 32nd Annual IEEE Applied Power Electronics Conference & Exposition (APEC) (Tampa, FL, USA), Mar. 2017 (to appear).