Category Archives: Conference/Workshop

VMC2012

Posted on 11/12/12 Monday by ts

2012年11月8日，VMC2012 (IEEE/ACM Workshop on Variability Modeling and Characterization 2012)在美国加利福尼亚州圣何塞市隆重开幕，本研究室进行了研究成果的海报发表，并于附近的计算机历史博物馆就计算机的发展史参观学习。 Michihiro Shintani and Takashi Sato, “Adaptive Current-Threshold Determination for Accurate IDDQ Testing,” IEEE/ACM Workshop on Variability Modeling and Characterization (VMC2012), November 2012.

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EPEPS2012 (2012/10/22-24)

Posted on 10/27/12 Saturday by ts

2012年10月22日-24日间，EPEPS2012 (21st Conference on Electrical Performance of Electronic Packaging and Systems)在美国亚利桑那州坦佩市Tempe Mission Palms Hotel召开。本研究室就与村田制作所合作研究的成果进行了发表。 Koh Yamanaga and Takashi Sato, “The odd couple: antiresonance control by two capacitors of unequal series resistances,” IEEE 21st Conference on Electrical Performance of Electronic Packaging … Continue reading →

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DA Symposium 2012

Posted on 08/31/12 Friday by admin

2012年8月29日〜30日在ホテル下呂温泉水明館举办的DA Symposium 2012上，研究生清水同学发表了自己的研究成果（发表题目如下）。 Hirofumi Shimizu, Hiromitsu Awano, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Estimation of Model Parameters for Random Telegraph Noise Based on Information Criterion,” in Proc. of IPSJ DA Symposium 2012, Aug. 2012 (in Japanese).

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第25届 Workshop on Circuits and Systems 在淡路岛梦舞台国际会议中心举办

Posted on 07/31/12 Tuesday by admin

2012年7月30日〜31日在淡路岛梦舞台国际会议中心举办的第25届 Workshop on Circuits and Systems中，修士二年级的森下同学，川島同学发表了自己的研究成果。 Takumi Morishita, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Fast GPU Implementations of Krylov Subspace Methods for Power Grid Analysis,” in Proc. of Workshop on Circuits and Systems, pp.432-437, July 2012 (in Japanese). Junya Kawashima, … Continue reading →

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Smart Info-Media System(SIS)研究会(6/14-15)在带广市Ukati Plaza 举行

Posted on 06/18/12 Monday by admin

2012年6月14日〜15日，在带广市Ukati Plaza 举行的Smart Info-Media System(SIS)研究会上，筒井助教做了研究成果发表。 前野 達生, 筒井 弘, 尾上 孝雄, “動き検出履歴とコスト最適化に基づくデインタレース手法に関する検討”, 電子情報通信学会技術研究報告, Vol.112, No.78, SIS2012-15, pp.77-82, 2012年6月.

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DAC 2012 (06/03-07)

Posted on 06/13/12 Wednesday by admin

2012年6月03日〜07日，在美利坚合众国加利福尼亚州旧金山市，Moscone Center 举办的DAC2012 (the 49th Design Automation Conference) 上，以下研究成果被发表。 Jyothi B. Velamala, Ketul B. Sutaria, Takashi Sato, and Yu Cao, “Physics matters: statistical aging prediction under trapping/detrapping,” ACM/IEEE Design Automation Conference (DAC), pp.139-144, June, 2012. 本次发表是与美国亚利桑那州立大学(Arizona State University)共同研究的成果，并被DAC2012选为Best paper award … Continue reading →

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IEEE VTS’12 (04/23-26)

Posted on 06/13/12 Wednesday by admin

2012年4月23日〜26日，在美利坚合众国夏威夷州的Hyatt Maui举办了 IEEE VTS’12 (30th VLSI Test Symposium) ，D2 的新谷先生发表了研究成果，发表题目如下： Michihiro Shintani and Takashi Sato, “A Bayesian-based process parameter estimation using IDDQ current signature,” IEEE VLSI test symposium (VTS), pp.86-91, April, 2012.

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ISQED2012 (03/19-03/21)

Posted on 05/01/12 Tuesday by admin

2012年3月19日〜21日，ISQED (The International Symposium on Quality Electronic Design) Symposium 2012 在美利坚合众国加利福尼亚州Santa Clara，Techmart Center举行。佐藤教授做了以下的研究发表。 Takashi Sato, Hiromitsu Awano, Hirofumi Shimizu, Hiroshi Tsutsui, and Hiroyuki Ochi: “Statistical Observations of NBTI-Induced Threshold Voltage Shifts on Small Channel-Area Devices,” in Proc. of International Symposium … Continue reading →

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TAU’12 (01/18-01/20)

Posted on 03/29/12 Thursday by admin

2012年1月18日〜20日に，台湾・台北市，National Taiwan Universityにて TAU ’12 Workshop (The 19th ACM/IEEE International Workshop o Timing Issues in the Specification and Synthesis of Digital Systems) が開催され，M2 湯浅が発表を行いました． Hiroshi Yuasa, et.al., “Acceleration Scheme for Monte Carlo based SSTA using Generalized STA Processing Element”

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2011年 所有参加的学会

Posted on 03/29/12 Thursday by admin

2011年03月14日～03月16日，ISQED(The International Symposium on Quality Electronic Design) Symposium 2011在美利坚合众国加利福尼亚州Santa Clara，Hyatt Regency Hotel举行，M1(当時)湯浅同学进行了研究成果发表。 Hiroshi Yuasa, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato: “A Fully Pipelined Implementation of Monte Carlo Based SSTA on FPGAs,” in Proc. of International Symposium on Quality Electrical … Continue reading →

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