Category Archives: Publication

Paper Published on IEEE Transactions on Device and Materials Reliability

Posted on Thursday September 18th, 2014 by admin

The following article has been published on IEEE Transactions on Device and Materials Reliability. Hiromitsu Awano, Masayuki Hiromoto and Takashi Sato, “BTIarray: A Time-overlapping Transistor Array for Efficient Statistical Characterization of Bias Temperature Instability,” IEEE Transactions on Device and Materials … Continue reading →

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Paper Published on IEICE Transactions on Information an Systems

Posted on Tuesday August 12th, 2014 by ts

The following paper has been published on IEICE Transactions on Information and Systems. IDDQ test is a way of measuring manufacturing faults in chips by measuring the leakage current while the chip is in its quiescent state (i.e., when all … Continue reading →

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(日本語) IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciencesへの論文採録決定

Posted on Monday August 11th, 2014 by hiromoto

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(日本語) 情報処理学会 SLDM研究会

Posted on Monday June 2nd, 2014 by hiromoto

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A paper has been accepted for publication in IEEE Transactions on Device and Materials Reliability

Posted on Wednesday May 21st, 2014 by admin

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A paper has been accepted for publication in IEICE Transactions

Posted on Monday April 28th, 2014 by ts

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(日本語) IEICE Transactions on Electronics への論文掲載

Posted on Tuesday April 22nd, 2014 by ts

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A paper has been accepted for publication in IEEE Transactions on Device and Materials Reliability

Posted on Monday March 3rd, 2014 by ts

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Our paper has been accepted for publication in IEEE Trans. on CAD

Posted on Tuesday January 21st, 2014 by ts

The following paper has been accepted for publication in IEICE Transactions on Electronics. Michihiro Shintani, Takumi Uezono, Tomoyuki Takahashi, Kazumi Hatayama, Takashi Aikyo, Kazuya Masu, and Takashi Sato, “A Variability-Aware Adaptive Test Flow for Test Quality Improvement,” to appear in … Continue reading →

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A paper has been accepted for publication in IEICE Transactions

Posted on Monday January 6th, 2014 by ts

The following paper has been accepted for publication in IEICE Transactions on Electronics. Shiho Hagiwara, Takanori Date, Kazuya Masu, and Takashi Sato, “Hypersphere Sampling for Accelerating High-Dimension and Low-Failure Probability Circuit-Yield Analysis,” to appear in IEICE Transactions on Electronics.

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