Category Archives: Publication

ISQED2016: paper accepted

The following paper has been accepted for presentation in ISQED 2016. Song Bian, Michihiro Shintani, Shumpei Morita, Masayuki Hiromoto, and Takashi Sato: “Nonlinear Delay-Table Approach for Full-Chip NBTI Degradation Prediction,” in Proc. of International Symposium on Quality Electronic Design (ISQED) … Continue reading

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Students’ papers accepted for presentation in TAU 2016

The following papers are accepted for publication in TAU workshop 2016, congratulations! Hiromitsu Awano and Takashi Sato: “Efficient Transistor-Level Timing Yield Estimation via Line Sampling,” in Proc. of ACM/IEEE International Workshop on Timing Issues (TAU) (Santa Rosa, CA), Mar. 2016 … Continue reading

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ISCAS2016: paper accepted

The paper below has been accepted for ISCAS2016, which will be held in May 2016 at Montreal, Canada. Motoki Yoshinaga, Hiromitsu Awano, Masayuki Hiromoto, and Takashi Sato: “Physically Unclonable Function using RTN-Induced Delay Fluctuation in Ring Oscillators,” IEEE International Symposium … Continue reading

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(日本語) 電気学会 半導体電力変換研究会

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Design Gaia 2015

At Design Gaia 2015, held in Nagasaki, Awano presented his recent research work. IEEE CEDA All Japan Joint Chapter Design Gaia Best Poster Award was given on his poster presentation. 粟野 皓光,佐藤 高史: モンテカルロ法に基づくタイミング歩留り解析の高速化, 電子情報通信学会技術研究報告(デザインガイア2015), VLD2015-16, 長崎県勤労福祉会館, 2015年12月.

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(日本語) VMC2015

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(日本語) 電気学会 電子デバイス・半導体電力変換 合同研究会

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(日本語) 2015年 電子情報通信学会 ソサイエティ大会

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(日本語) DAシンポジウム2015

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(日本語) 第28回 回路とシステムワークショップ 採択決定

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