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A paper has been just published in the November issue of IEEE Transactions on Electron Devices. J.B. Velamala, K.B. Sutaria, H. Shimizu, H. Awano, T. Sato, G. Wirth, and Y. Cao, “Compact Modeling of Statistical BTI Under Trapping/Detrapping,” IEEE Transactions … Continue reading
The following paper has been accepted in the IEICE Transactions on Electronics. Koh Yamanaga, Shiho Hagiwara, Ryo Takahashi, Kazuya Masu, and Takashi Sato, “State-Dependence of On-Chip Power Distribution Network Capacitance: Measurement and Analysis, to appear in IEICE Transactions on Electronics, … Continue reading
The following papers are published on Trans. IEICE. Hiroshi Yuasa, Hiroshi Tsutsui, Hiroyuki Ochi and Takashi Sato, “Parallel acceleration scheme for Monte Carlo based SSTA using generalized STA processing element,” IEICE Transactions on Electronics, Vol.E96-C, No.4, pp.473-481, April, 2013. (Kyoto … Continue reading
The following paper is accepted for presentation at GLSVLSI2013, which will be held on May 2-4 in Paris, France. Takumi Morishita, Hiroshi Tsutsui, Hiroyuki Ochi and Takashi Sato, ”Fast and Memory-Efficient GPU Implementations of Krylov Subspace Methods for Efficient Power … Continue reading
On November 8th, Prof. Sato presented the following work (poster presentation) at VMC2012 (IEEE/ACM Workshop on Variability Modeling and Characterization 2012), which was held in San Jose, CA. Michihiro Shintani and Takashi Sato, “Adaptive Current-Threshold Determination for Accurate IDDQ Testing,” … Continue reading
We presented the following work at EPEPS2012 (21st Conference on Electrical Performance of Electronic Packaging and Systems), which was held in Tempe Mission Palms Hotel, Tempe, AZ, from Oct. 22 to 24. This work is a collaborative research with Murata … Continue reading