Author Archives: admin

Encouraging Prize from the 24th Workshop on Circuits and Systems

Posted on Monday July 30th, 2012 by admin

At the 25th Workshop on Circuits and System, Mr Kawashima, a second year graduate student, has been awarded an encouraging prize with respect to his following work presented in the same conference last year. Junya Kawashima, Hiroyuki Ochi, Hiroshi Tsutsui, and … Continue reading →

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IEICE Trans. Fundamentals, Special Section on “VLSI Design and CAD Algorithms” への採録決定

Posted on Sunday July 29th, 2012 by admin

The following two papers have been accepted for publication in IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Special Section on “VLSI Design and CAD Algorithms”, December 2012 Issue. Hiromitsu Awano, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Bayesian … Continue reading →

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Papers accepted for publication in IEICE Trans. Fundamentals, Special Section on “VLSI Design and CAD Algorithms”

Posted on Sunday July 29th, 2012 by admin

The following two papers have been accepted for publication in IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Special Section on “VLSI Design and CAD Algorithms”, December 2012 Issue. Hiromitsu Awano, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Bayesian … Continue reading →

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デザインコンテスト(2012年度シンセシス設計セミナー)最優秀賞受賞

Posted on Thursday July 19th, 2012 by admin

At a design contest (target design: SAD/SATD circuit) hosted by Synthesis Corporation, the team named KU&KCCT by Kobe City College of Technology and our laboratory won the 1st prize among 5 teams.

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1st prize at design competition (Synthesis Co. Design Seminar 2012)

Posted on Thursday July 19th, 2012 by admin

At a design contest (target design: SAD/SATD circuit) hosted by Synthesis Corporation, the team named KU&KCCT by Kobe City College of Technology and our laboratory won the 1st prize among 5 teams.

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スマートインフォメディアシステム(SIS)研究会(6/14-15)@帯広市とかちプラザ

Posted on Monday June 18th, 2012 by admin

2012年6月14日〜15日に帯広市とかちプラザにて開催されたスマートインフォメディアシステム(SIS)研究会にて筒井(助教)が研究成果を発表しました． 前野 達生, 筒井 弘, 尾上 孝雄, “動き検出履歴とコスト最適化に基づくデインタレース手法に関する検討”, 電子情報通信学会技術研究報告, Vol.112, No.78, SIS2012-15, pp.77-82, 2012年6月.

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DAC 2012 (06/03-07)

Posted on Wednesday June 13th, 2012 by admin

Sorry, this entry is only available in 中文 and 日本語.

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IEEE VTS’12 (04/23-26)

Posted on Wednesday June 13th, 2012 by admin

2012年4月23日〜26日に，アメリカ合衆国・ハワイ州，Hyatt Mauiにて IEEE VTS’12 (30th VLSI Test Symposium) が開催され，D2 新谷が発表を行いました． Michihiro Shintani and Takashi Sato, “A Bayesian-based process parameter estimation using IDDQ current signature,” IEEE VLSI test symposium (VTS), pp.86-91, April, 2012.

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ISQED2012 (03/19-03/21)

Posted on Tuesday May 1st, 2012 by admin

2012年3月19日〜21日に，アメリカ合衆国・カリフォルニア州Santa Clara，Techmart Centerにて開催された ISQED (The International Symposium on Quality Electronic Design) Symposium 2012 で，佐藤が研究成果の発表を行いました． Takashi Sato, Hiromitsu Awano, Hirofumi Shimizu, Hiroshi Tsutsui, and Hiroyuki Ochi: “Statistical Observations of NBTI-Induced Threshold Voltage Shifts on Small Channel-Area Devices,” in Proc. of International … Continue reading →

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研究会歓迎会 2012

Posted on Wednesday April 18th, 2012 by admin

新しく佐藤高史研究室に配属された，M1 藤田，B4 岡崎，佐川，畑の歓迎会を 4/17 に百万遍しゃらくで行いました．

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