Author Archives: hiromoto

Student paper accepted for presentation in DAC 2017

Posted on Monday February 13th, 2017 by hiromoto

The following paper has been accepted for presentation in DAC 2017 (ACM/IEEE Design Automation Conference). Song Bian, Michihiro Shintani, Masayuki Hiromoto, and Takashi Sato: “LSTA: Learning-Based Static Timing Analysis for High-Dimensional Correlated On-Chip Variations,” in Proc. of ACM/IEEE Design Automation … Continue reading →

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(日本語) 3回生（研究室配属対象者）の皆さんへ

Posted on Sunday February 5th, 2017 by hiromoto

Sorry, this entry is only available in 日本語.

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(日本語) 第42回パルテノン研究会

Posted on Tuesday December 20th, 2016 by hiromoto

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(日本語) 2016年度 忘年会

Posted on Monday December 19th, 2016 by hiromoto

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Paper accepted for publication in Japanese Journal of Applied Physics

Posted on Monday December 19th, 2016 by hiromoto

The following paper has been accepted for publication in Japanese Journal of Applied Physics (JJAP). Michihiro Shintani, Yohei Nakamura, Masayuki Hiromoto, Takashi Hikihara, and Takashi Sato: “Measurement and Modeling on Gate-Drain Capacitance of Silicon Carbide Vertical MOSFET,” Japanese Journal of … Continue reading →

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Student paper accepted for presentation in ISQED 2017

Posted on Tuesday December 6th, 2016 by hiromoto

The following paper has been accepted for presentation in ISQED 2017 (International Symposium on Quality Electronic Design). Shumpei Morita, Song Bian, Michihiro Shintani, Masayuki Hiromoto, and Takashi Sato: “Comparative Study of Path Selection and Objective Function in Replacing NBTI Mitigation Logic,” … Continue reading →

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Student paper accepted for presentation in ICMTS 2017

Posted on Monday December 5th, 2016 by hiromoto

The following paper has been accepted for presentation in ICMTS 2017 (International Conference on Microelectronic Test Structures). Kazuki Oishi, Michihiro Shintani, Masayuki Hiromoto, and Takashi Sato: “Input Capacitance Determination of Power MOSFETs from Switching Trajectories,” in Proc. of International Conference … Continue reading →

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NOLTA 2016

Posted on Monday December 5th, 2016 by hiromoto

Dr. Shintani and Mr. Zhou presented their papers at International Symposium on Nonlinear Theory and Its Applications (NOLTA 2016) held in Yugawara, Japan. Dr. Shintani’s talk was on the gate driver without its switching loss. As switching frequency increases, the … Continue reading →

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ATS 2016

Posted on Monday November 28th, 2016 by hiromoto

Mr. Bian presented his paper at Asian Test Symposium (ATS 2016) held in International Conference Center Hiroshima, Japan. Song’s talk was on the mitigation of NBTI degradation in processors. Integrated circuits suffer from the so called aging effect, represented by … Continue reading →

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(日本語) 電気学会 電子デバイス・半導体電力変換合同研究会 学生奨励賞を受賞

Posted on Thursday November 24th, 2016 by hiromoto

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