Tag Archives: VLD

(日本語) 2016年3月VLD研究会

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(日本語) 2015年3月VLD研究会

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VLD Excellent Student Author Award for ASP-DAC

On March 4th, at Okinawa, Mr. Shintani received the VLD Excellent Student Author Award for ASP-DAC. This award is given to the student who presented an influencial paper in ACM/IEEE Asia South Pacific Design Automation Conference (ASP-DAC). The prize paper … Continue reading

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(日本語) VLSI設計技術研究会 (VLD)

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Design Gaia 2012

Zhi Li (master course 2nd degree) has made a presentation about his work at Design Gaia 2012. Zhi Li, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato, “Accurate I/O Buffer Impedance Self-Adjustment using Vth and Temperature Sensors,” IEICE Technical Report, Vol.112, No.320, … Continue reading

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参加学会2011年

2011年03月14日~03月16日に,アメリカ合衆国・カリフォルニア州Santa Clara,Hyatt Regency HotelにてISQED(The International Symposium on Quality Electronic Design) Symposium 2011が開催され,M1(当時)の湯浅君が発表を行いました. Hiroshi Yuasa, Hiroshi Tsutsui, Hiroyuki Ochi, and Takashi Sato: “A Fully Pipelined Implementation of Monte Carlo Based SSTA on FPGAs,” in Proc. of International Symposium on Quality Electrical … Continue reading

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