Tag Archives: ACM

(日本語) DAC2018

Posted on Tuesday July 3rd, 2018 by ts
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A paper accepted for presentation in ICCAD2018

Posted on Monday July 2nd, 2018 by ts

Sorry, this entry is only available in 日本語.

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DATE2018

Posted on Friday April 6th, 2018 by ts

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ACM/IEEE ASP-DAC 2018

Posted on Monday January 29th, 2018 by ts

Mr.  Shumpei Morita presented his paper in the 23rd Asia and South Pacific Design Automation Conference (ASP-DAC 2018) held in Jeju Island, Korea. Morita’s talk was about the analysis of the circuit degradation. The effect of negative bias temperature instability (NBTI) … Continue reading →

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A paper presented at DAC2017

Posted on Wednesday June 28th, 2017 by hiromoto

Mr. Song Bian presented his paper in Design Automation Conference (DAC) 2017 held in Austin, Tx. Song’s presentation was on creating learning-based STA libraries for characterizing aging-induced device variations. Traditional approach to the accurate characterization of aging (specifically negative bias … Continue reading →

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DATE 2017

Posted on Tuesday April 4th, 2017 by hiromoto

Mr. Song Bian presented his paper at Design, Automation and Test  in Europe (DATE) 2017 held in Lausanne, Switzerland. The acceptance rate of oral presentation is 24%. Song’s talk was on the realization of a secured content addressable memory (CAM) … Continue reading →

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Student paper accepted for presentation in DAC 2017

Posted on Monday February 13th, 2017 by hiromoto

The following paper has been accepted for presentation in DAC 2017 (ACM/IEEE Design Automation Conference). Song Bian, Michihiro Shintani, Masayuki Hiromoto, and Takashi Sato: “LSTA: Learning-Based Static Timing Analysis for High-Dimensional Correlated On-Chip Variations,” in Proc. of ACM/IEEE Design Automation … Continue reading →

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ACM/IEEE ASPDAC 2017

Posted on Wednesday January 25th, 2017 by ts

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Paper accepted for presentation in ASP-DAC 2017

Posted on Monday September 5th, 2016 by hiromoto

The following paper has been accepted for presentation in ASP-DAC 2017 (Asia and South Pacific Design Automation Conference). Acceptance rate 31%=111/358. Hiromitsu Awano, Masayuki Hiromoto, and Takashi Sato: “Efficient Circuit Failure Probability Calculation Along Product Lifetime Considering Device Aging,” 22nd … Continue reading →

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A paper presented at DAC2016

Posted on Wednesday June 15th, 2016 by ts

Dr. Awano presented a paper in Design Automation Conference (DAC) 2016 held in Austin, Tx. His talk is about the accelerated calculation of timing yield of logic circuits. By introducing the idea of Line sampling to the timing analysis, simulations … Continue reading →

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